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[VHDL-FPGA-Verilog] simple_fm_receiver.tar

Description: FM收音机的解码及控制器VHDL语言实现，Xilinx提供的．别谢我．-FM radio decoder and controller VHDL, Xilinx provide. I thank other.
Platform: | Size: 70656 | Author: 喻袁洲 | Hits:

[VHDL-FPGA-Verilog] verilogHDL

Description: 用Verilog HDL语言实现通用异步收发URAT装置-With the Verilog HDL language to achieve universal asynchronous receiver URAT Device
Platform: | Size: 26624 | Author: chenke | Hits:

[VHDL-FPGA-Verilog] pos

Description: POS（10GE）verilog代码，加入到工程中就成为仿真平台POS发包、接收器。-POS（10GE）receiver and sender
Platform: | Size: 6144 | Author: daisy | Hits:

[VHDL-FPGA-Verilog] ps2test

Description: 本代码功能为实现接收PS2键盘编码功能。 程序通过quartusII 8.1编译，使用verilog语言编写。 可在彬杰科技*BJTECH公司基于altera epm240的开发板上验证。 （开发板网址http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm） 有需要的朋友可以下载参考-The code functions to achieve the receiver PS2 keyboard encoding. Procedure quartusII 8.1 compiler, use the verilog language. Bin Jie in science and technology* BJTECH company' s development board based on altera epm240 verification. (Development Board web site http://item.taobao.com/auction/item_detail-0db1-69fe7069aa3ba544abf783bc4427b377.htm) in need of friends can download reference
Platform: | Size: 118784 | Author: 彬杰科技 | Hits:

[Other] uart.v.tar

Description: uart Universal asyncronous receiver and transmitter verilog code
Platform: | Size: 1024 | Author: balu | Hits:

[VHDL-FPGA-Verilog] hongwai

Description: verilog 实现红外的接收，虽然简单，对入门有一定的帮助-verilog to achieve infrared receiver, though simple, have some help for beginners
Platform: | Size: 296960 | Author: 夜雨 | Hits:

[VHDL-FPGA-Verilog] UART

Description: UART (universal asynchronous receiver transmitter protocol) working verilog
Platform: | Size: 2048 | Author: Salman | Hits:

[VHDL-FPGA-Verilog] IR

Description: 利用verilog编写的红外线接收解码电路，开发环境为altera板，quartusII仿真并在开发板上验证通过-Prepared using verilog infrared receiver decoder circuit, the development environment for the altera board, quartusII simulation and validated by the development board
Platform: | Size: 669696 | Author: sjl | Hits:

[VHDL-FPGA-Verilog] EP2C8_PER_uart_receive

Description: EP2C8Q208,串口接收程序，verilog编写的，希望对大家有用-EP2C8Q208, the receiver program, verilog written in the hope that useful
Platform: | Size: 77824 | Author: wangyunlong | Hits:

[VHDL-FPGA-Verilog] irda_rx

Description: 红外收发器接收模块，很好很强大。采用Verilog设计并用Modelsim进行仿真，功能完全正确。-Infrared transceiver receiver module, very very strong. Using Verilog design and simulation using Modelsim, function entirely correct.
Platform: | Size: 4731904 | Author: iswl2009 | Hits:

[VHDL-FPGA-Verilog] rx_fifo

Description: verilog语言写的接收机FIFO，适用于xilinx环境-verilog language to write the receiver FIFO, the environment for xilinx
Platform: | Size: 5120 | Author: 刘春 | Hits:

[Windows Develop] Tuart_tx_rxh

Description: 该工程用verilog编写，已通过串口调试助手调试通过，接收模块采采用8倍波特率采样数据，有较好的滤波功能，在PC上完成自发自收功能。 -The project is written in verilog debugging through serial debugging assistant, adopted 8 times the baud rate sampling data receiver module, better filtering done on the PC spontaneous self-closing function.
Platform: | Size: 1317888 | Author: 对称 | Hits:

[VHDL-FPGA-Verilog] uart

Description: 串口通信控制器的Verilog实现。包含4个模块：顶层模块、波特率发生器模块、发送模块和接收模块-The serial communication controller Verilog. Contains four modules: the top-level module, the baud rate generator module, transmitting module and receiver module
Platform: | Size: 3072 | Author: 王帆淼 | Hits:

[VHDL-FPGA-Verilog] uart_tx_and_rx

Description: A verilog code for UART transmitter and receiver system-A verilog code for UART transmitter and receiver system...
Platform: | Size: 1024 | Author: EBIN JOY | Hits:

[VHDL-FPGA-Verilog] rxd

Description: 用verilog实现的串口接收程序，仿真通过-Verilog implementation receiver program, through simulation
Platform: | Size: 334848 | Author: hr | Hits:

[VHDL-FPGA-Verilog] prbs

Description: verilog 格式的prbs数据。可以用于对发射机和接收机的误码率的测试-verilog format prbs data. Can be used for the testing of the transmitter and receiver BER
Platform: | Size: 1024 | Author: lexie | Hits:

[VHDL-FPGA-Verilog] UART

Description: 本论文使用Verilog HDL 语言描述硬件功能，利用QuartusII 5.0在 FPGA 芯片上的综合描述,采用模块化设计方法设计UART（通用异步收发器）的各个模块。-The paper using Verilog HDL language to describe hardware features, the use of the FPGA chip QuartusII 5.0 comprehensive description of the modular design approach to the design of each module of UART (Universal Asynchronous Receiver Transmitter).
Platform: | Size: 312320 | Author: wangjianyuan | Hits:

[VHDL-FPGA-Verilog] xapp495(1)

Description: 实现HDMI的receiver和transmitter，来源xilinx xapp(Implement HDMI interface 1.0, including receiver and transmitter,from Xilinx xapp)
Platform: | Size: 48128 | Author: likaiyi | Hits:

[VHDL-FPGA-Verilog] rx_module

Description: 接收机的顶层模块构建,对需要参考的朋友有一定的帮助(The construction of the top module of the receiver is helpful to friends who need reference.)
Platform: | Size: 2082816 | Author: 月@夜 | Hits:

[VHDL-FPGA-Verilog] 好-无线通信FPGA设计-Xilinx

Description: 《无线通信FPGA设计》以Xilinx公司的FPGA开发平台为基础，综合FPGA和无线通信技术两个方向，通过大量的FPGA开发实例，较为详尽地描述了无线通信中常用模块的原理和实现流程，包括数字信号处理基础、数字滤波器、多速率信号处理、数字调制与解调、信道编码、系统同步、自适应滤波算法、最佳接收机，以及WCDMA系统的关键技术。《无线通信FPGA设计》概念明确、思路清晰，追求全面、系统、实用，使读者能够在较短的时间内具备无线通信领域的FPGA开发能力。(The design of wireless communication FPGA is based on the development platform of Xilinx's FPGA and combines the two directions of FPGA and wireless communication technology. Through a large number of examples of FPGA development, the principle and implementation process of common modules in wireless communication are described in detail, including the basis of digital signal processing, digital filter and multi-rate signal. Processing, digital modulation and demodulation, channel coding, system synchronization, adaptive filtering algorithm, optimal receiver, and key technologies of WCDMA system. The concept of Wireless Communication FPGA Design is clear, and the idea is clear. It pursues comprehensiveness, system and practicality, so that readers can have the ability to develop FPGA in the field of wireless communication in a relatively short time.)
Platform: | Size: 11018240 | Author: 无线电之家99 | Hits:
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